Application of a Simplified PLL Algorithm for Unbalanced Three Phase Systems by Using Low Cost Microcontrollers

In literature, there are many Phased Locked Loop (PLL) methods achieving grid matching successfully under unbalanced grid conditions. However, these methods require high computational resources. In this article, a simplified PLL algorithm has been used with fixed point arithmetic for detecting phase and magnitude of an unbalanced three phase system. The simplification factor comes from the fact that an easy to implement low pass filtering algorithm has been implemented in a 16 bit microcontroller operating at 20 MHz clock speed. Sampling frequency has been selected as 20 kHz so that a low cost grid connected inverter operating up to 20 kHz switching frequency can be designed.


INTRODUCTION
One of the important aspects of designing grid connected power electronics systems such as active power filters, distributed power generation systems, flexible AC transmission systems, High Voltage DC transmission systems, distributed energy sources, is the synchronization of the inverter output with the grid itself.Synchronization with the grid means matching the phase and the magnitude of the inverter output voltage with those of the grid voltage.By having this phase information of the grid it would be possible to control the power factor, active and reactive power flow of the system as shown by the authors in [1][2].
Hardware and software adopted PLL methods for grid matching have already been implemented in many applications.Hardware adopted PLL, such as zerocrossing detection can be easy to apply; however at poor grid conditions it would be unreliable.Basic software PLL method, that can easily be implemented, is SRF-PLL (Synchronous Reference Frame PLL).However, just as zero-crossing detection hardware PLL, the quality of the results gathered with SRF-PLL as shown in Fig. 1 are not reliable in unbalanced grid conditions as stated by the author in [3].In literature, solutions for synchronization with poor grid conditions have been vastly investigated and closed loop methods, such as double synchronous reference frame PLL, multiple reference frame PLL, synchronous reference frame PLL with positive sequence filter/detector, synchronous reference frame PLL with sinusoidal signal integrator etc. have been proposed by authors in [4][5][6][7][8][9][10][11][12][13].In [14][15][16] authors have proposed open loop methods such as weighted least square estimation, low pass filtering transformation angle detector, normalized positive sequence synchronous frame etc.
Even though the above mentioned methods have solved the poor grid synchronization problem effectively, the application of these methods in low cost systems becomes inefficient due to the fact that these systems require solutions with less complexity.In this paper, multiple reference frame PLL method utilizing easy to implement low pass filtering with a very low cost 16 bit microcontroller has been used.As a result, a low power low cost grid connected inverter even under unbalanced grid conditions could be designed without the need for high computational resource requirements provided by digital signal processors.

POSITIVE AND NEGATIVE SEQUENCE COMPONENTS OF GRID VOLTAGE
Three phase system voltages shown with Eq. ( 1) can be expressed as balanced positive sequence, negative sequence and zero sequence components according to Fortescue Theorem.Positive sequence components rotate in the positive direction of the reference frame.By locking to the phase and frequency of the positive sequence components, grid synchronization under unbalanced conditions could be achieved.Negative sequence components, on the other hand, which rotate in the reverse direction of positive sequence, are utilized for grid code compatibility in distributed power generation systems.In Eq. ( 2), positive and negative sequence components of each phase have been shown.The phase information of positive and negative sequence voltages are shown individually in Eq. (3) and Eq. ( 4).For the sake of simplicity 1 0 p θ and 1 0 n θ will be considered to be zero.
As seen from Eq. ( 6), negative sequence components have twice the fundamental angular frequency rotating in the opposite direction to that of positive sequence components.Once these negative sequence components are eliminated, it would be possible to achieve effective PLL which is free of unbalanced grid conditions. ) ) )

APLICATION OF LOW PASS FILTERING WITH SIMPLE MICROCONTROLLERS
As shown in previous section, negative sequence components introduce sinusoidal values having twice the angular frequency of the fundamental angular frequency.PLL methods introduced in literature proposed for solving unbalanced grid condition problem utilize IIR or FIR type digital filters that are capable of either attenuating these sinusoidal values by low pass filtering or shifting the phase angle with all pass filters to utilize new sinusoidal values for their PLL algorithms.Though the filtering methods used are quite successful, due to the extensive resource requirements of mathematical calculation for these digital filter types, application of these filters with standard simple microcontrollers becomes the limiting factor for overall performance of a low cost grid connected inverter.Therefore in this paper, instead of using an IIR or an FIR type digital filter, a less complicated method for low pass filtering has been used.
The low pass filter used in this paper is actually based on the operating principle of an analog low pass RC filter as shown by author in [17].Theoretically, a differential equation is required for solving an RC circuit.The voltage difference between output and input divided by the value of R will define the capacitor current.Considering that the current flowing on the capacitor is constant for a sampling period, Eq. ( 7) and Eq. ( 8) can be written.If the capacitor is selected such that the voltage change in consecutive sampling instants is low enough then Eq. ( 9) can be written.By using a single constant term k that covers all the constant terms Eq. ( 10), Eq. ( 9) turns into Eq.( 11).Eq. ( 11) is the core formula for the low pass filter used.By changing the value of k it would be possible to change the corner frequency of the filter itself.The block diagram representation of Eq. ( 12) is shown in Fig. 2.
( ) ( ) ( ) If constant k is selected as multiples of 2 then it would be possible to make the calculations much easier in a microcontroller used system.By taking T ∆ = 50 µsec, different corner frequency values have been calculated and shown in Tab. 1.In Fig. 3, basic simulation results were shown by selecting RC values which are matching the corresponding RC time constant values in Tab. 1.In order to compare the simulation results with the results of the filter algorithm, a digital analog converter has been used to convert the digital filter output values into analog world signals.The actual application results which coincide with simulation results are shown in Fig. 4, Fig. 5 and Fig. 6.

EXPERIMENTAL RESULTS OF PLL ALGORITHM UNDER UNBALANCED GRID CONDITIONS BY USING A SIMPLE MICROCONTROLLER
Three phase input voltages have been applied to the measurement circuit which consist of isolation amplifiers and post amplifiers.Isolation amplifiers have differential outputs therefore post amplifiers have been implemented to have single-ended voltage level.In Fig. 7, unbalanced voltage levels at the analog digital converter of the microcontroller are shown.As seen in the figure, one of the sinusoidal input voltages has an amplitude value which is half of the amplitudes of the other sinusoidals so 50% of unbalance is present.The results gathered with SRF-PLL are not reliable under unbalanced grid conditions due to the presence of negative voltage sequence of the grid as explained in previous sections.Here, it can be seen that frequency locking could not be achieved with SRF-PLL.In order to gather the experimental results under unbalanced grid conditions, a PLL method which is attenuating the negative voltage sequence, such as MRF-PLL, has been used.Block diagram illustration of MRF-PLL is shown in Fig. 8.  Fig. 9 illustrates positive sequence D component of input voltage along with the unbalanced two phases out of the three phases and the detected phase before the phase is locked.Before the detected phase settled to the final state, the effect of negative voltage sequence can be seen clearly.After phase is locked, phase information is free of the negative sequence components as shown in Fig. 10.Reliable grid matching under unbalanced grid conditions can be achieved with a low cost 16 bit microcontroller as shown in Fig. 11.

CONCLUSION
In order to solve the poor grid synchronization problem caused by the negative voltage sequence of unbalanced grid, effective PLL methods have been proposed and implemented in literature.The drawback of these methods is the complexity to apply with simple microcontrollers for low cost applications.In this paper, an easy to use low pass filter algorithm has been implemented in MRF-PLL method.The experimental results have shown that at 20 kHz of sampling frequency, it is possible to detect the phase and frequency of the unbalanced grid by eliminating the negative sequence components.These results allow cost optimized grid connected inverter operating up to 20 kHz switching frequency to be designed using a simple 16 bit microcontroller without extensive resources.

Figure 2
Figure 2 Block diagram representation of simplified RC filter algorithmQ C V I T = × = ×(7)

Figure 5 256 Figure 6
Figure 5 Experimental results of RC filter algorithm with microcontroller when k=1/256

Figure 9
Figure 9 Before phase locked, CH1: detected phase information, CH2 and CH3: input phase voltages, CH4: positive sequence D component Low pass filtering explained in previous section has been implemented into the algorithm used in the low cost microcontroller for MRF-PLL application under

Table 1
(10)ime constant values and corresponding filter corner frequencies based on different values of k utilizing(10)