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International Journal of Electrical and Computer Engineering Systems, Vol. 14 No. 5, 2023.

Case report, case study

https://doi.org/10.32985/ijeces.14.5.11

Design and analysis of a new multi-level inverter topology with a reduced number of switches and controlled by PDPWM technique

Fatima Chakir orcid id orcid.org/0000-0002-3682-0954 ; IESI Laboratory, Department of Electrical Engineering, Faculty of Science and Technology, ENSET Mohammedia, Hassan II University Of Casablanca, Morocco
Abdelmounime EL Magri orcid id orcid.org/0000-0002-4781-113X ; IESI Laboratory, Department of Electrical Engineering, Faculty of Science and Technology, ENSET Mohammedia, Hassan II University Of Casablanca, Morocco
Rachid Lajouad ; IESI Laboratory, Department of Electrical Engineering, Faculty of Science and Technology, ENSET Mohammedia, Hassan II University Of Casablanca, Morocco
Mohamed Kissaoui ; IESI Laboratory, Department of Electrical Engineering, Faculty of Science and Technology, ENSET Mohammedia, Hassan II University Of Casablanca, Morocco
Mostafa Chakir ; CED-ST, LESSI, Faculty of Sciences Dhar el Mehraz, Sidi Mohamed Ben Abdellah University, BP 1796, Fez-Atlas, 30003 Fez, Morocco
Omar Bouattane ; IESI Laboratory, Department of Electrical Engineering, Faculty of Science and Technology, ENSET Mohammedia, Hassan II University Of Casablanca, Morocco

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Abstract

With their many advantages, including low power dissipation in power switches, low harmonic content, and reduced electromagnetic interference (EMI) from the inverter, multilevel converter (MLI) topologies are becoming more and more in demand in high and medium power applications. This paper introduces a novel multi-level symmetric inverter topology with adopted control. The objectives of this article are to architecturally define the positions of the various switches, to choose the right switches and to propose an inverter control strategy that will eliminate harmonics while producing the ideal output voltage/current. By using fewer switching elements, fewer voltage sources, and switches with a total harmonic content (THD) which reduces losses and a drop in minimum voltage (Vstrssj), the proposed topology is more efficient than conventional inverters with the same number of levels. The new topology will be demonstrated using a seven-level single-phase inverter. For various modulation indices, MATLAB-SIMULINK is used to study and validate the topology.

Keywords

Inverter multi-level; Approximate controls; Total harmonic distortion (THD); Pulse with modulation (PWM);

Hrčak ID:

303576

URI

https://hrcak.srce.hr/303576

Publication date:

5.6.2023.

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