Izvorni znanstveni članak
https://doi.org/10.1080/00051144.2024.2362525
Advanced gate driving concepts and switching optimization for SiC semiconductors
Tomislav Ivaniš
; Department of Electric Machines, Drives and Automation, Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia
*
Marinko Kovačić
; Department of Electric Machines, Drives and Automation, Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia
Martin Makar
; Department of Electric Machines, Drives and Automation, Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia
Željko Jakopović
; Department of Electric Machines, Drives and Automation, Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia
* Dopisni autor.
Sažetak
Silicon carbide (SiC) MOSFETS are increasingly favoured in power electronics for their improved
properties compared to silicon-based counterparts, such as IGBTs. Their ability to operate at
higher switching frequencies and execute faster switching transients is notable. However, these
features also raise significant concerns with electromagnetic interference (EMI). To exploit the
full capabilities of SiC-based technology, meticulous design strategies encompassing the power
stage, commutation loop, and gate drive are essential. This paper conducts a comprehensive
review of existing gate drive techniques aimed at enhancing the performance of SiC devices.
Moreover, this study introduces an innovative approach for optimizing switching processes
through the use of active gate drivers (AGD). By pre-mapping the gate-source voltage profiles
for different conditions (such as load current, temperature, and DC-link voltage), it is possible to
achieve a significantly improved switching trajectory. This optimization process can be applied
on a cycle-by-cycle basis in practical scenarios. Herein, pre-mapping and optimization have been
experimentally confirmed in a half-bridge configuration. Through simulation, it is demonstrated
that optimizing the switching trajectory can lead to a balanced compromise between EMI and
switching losses, showcasing the potential for significant performance enhancements in SiC
device operation.
Ključne riječi
Active gate driver; EMI control; dv/dt limiting; switching optimization; hard-switching model
Hrčak ID:
326281
URI
Datum izdavanja:
25.6.2024.
Posjeta: 0 *