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Original scientific paper

https://doi.org/10.2498/cit.1001762

RESETting Timed Machines

Ariel Stulman ; Computer Science Department, Jerusalem College of Technology, Jerusalem, Israel


Full text: english pdf 533 Kb

page 11-23

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Abstract

Many real-time applications enable RESET to account for all kinds of unexpected problems, or to accommodate for a users’ want of restarting. Additionally, some software testing techniques must allow for resetting timed-Implementations Under Test (t-IUT). Dedicated internal logic is probably the most common of solutions for accomplishing such tasks. There are situations, however, where such a privilege doesn’t exist; thus, it cannot be built upon. Testing pre-engineered timed-IUTs is one such case. In this paper we wish to present an algorithm for the direct generation of timed RESET sequences from the timed-IUT specification, such that it should be optimal w.r.t. to execution time.

Keywords

software/program verification; formal methods; models of computations; automata; realtime systems

Hrčak ID:

67546

URI

https://hrcak.srce.hr/67546

Publication date:

30.3.2011.

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