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Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes

M. A. Thornton ; Department of Computer Systems Engineering, University of Arkansas, Fayetteville, USA
D. L. Andrews ; Department of Computer Systems Engineering, University of Arkansas, Fayetteville, USA

Puni tekst: engleski, pdf (7 MB) str. 359-371 preuzimanja: 55* citiraj
APA 6th Edition
Thornton, M.A. i Andrews, D.L. (1998). Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes. Journal of computing and information technology, 6 (4), 359-371. Preuzeto s https://hrcak.srce.hr/150203
MLA 8th Edition
Thornton, M. A. i D. L. Andrews. "Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes." Journal of computing and information technology, vol. 6, br. 4, 1998, str. 359-371. https://hrcak.srce.hr/150203. Citirano 02.03.2021.
Chicago 17th Edition
Thornton, M. A. i D. L. Andrews. "Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes." Journal of computing and information technology 6, br. 4 (1998): 359-371. https://hrcak.srce.hr/150203
Harvard
Thornton, M.A., i Andrews, D.L. (1998). 'Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes', Journal of computing and information technology, 6(4), str. 359-371. Preuzeto s: https://hrcak.srce.hr/150203 (Datum pristupa: 02.03.2021.)
Vancouver
Thornton MA, Andrews DL. Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes. Journal of computing and information technology [Internet]. 1998 [pristupljeno 02.03.2021.];6(4):359-371. Dostupno na: https://hrcak.srce.hr/150203
IEEE
M.A. Thornton i D.L. Andrews, "Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes", Journal of computing and information technology, vol.6, br. 4, str. 359-371, 1998. [Online]. Dostupno na: https://hrcak.srce.hr/150203. [Citirano: 02.03.2021.]

Sažetak
Determining the resources needed to run a specific program is an important task for static task schedulers for existing multiprocessors. It can also be a valuable computer-aided engineering tool for the design and implementation of application specific parallel processors. An approach for dete rmining the required number of processors and the amount of memory needed per processor is described. The estimates are calculated using information available in a data-flow graph generated by a hig h-level language compiler. Metrics based on the notions of thread spawning and maximum length thread probability density functions are presented. The measures obtained from the parallelism profiles arc used as input to a queuing system model to predict the number of processing elements that can be exploited. Memory resource estimates are predic ted through a s imple graph traversal technique. Finally, experimental results are given to evaluate the methods.

Ključne riječi
multiprocessor; memory nodes

Hrčak ID: 150203

URI
https://hrcak.srce.hr/150203

Posjeta: 114 *