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https://doi.org/10.2498/cit.2000.03.06

A Hardware Architecture for Scheduling Complex Real-Time Task Sets

Angel Garcia
Alfons Crespo
Sergio Sáez
Joan Vila

Puni tekst: engleski, pdf (332 KB) str. 235-247 preuzimanja: 291* citiraj
APA 6th Edition
Garcia, A., Crespo, A., Sáez, S. i Vila, J. (2000). A Hardware Architecture for Scheduling Complex Real-Time Task Sets. Journal of computing and information technology, 8 (3), 235-247. https://doi.org/10.2498/cit.2000.03.06
MLA 8th Edition
Garcia, Angel, et al. "A Hardware Architecture for Scheduling Complex Real-Time Task Sets." Journal of computing and information technology, vol. 8, br. 3, 2000, str. 235-247. https://doi.org/10.2498/cit.2000.03.06. Citirano 12.12.2019.
Chicago 17th Edition
Garcia, Angel, Alfons Crespo, Sergio Sáez i Joan Vila. "A Hardware Architecture for Scheduling Complex Real-Time Task Sets." Journal of computing and information technology 8, br. 3 (2000): 235-247. https://doi.org/10.2498/cit.2000.03.06
Harvard
Garcia, A., et al. (2000). 'A Hardware Architecture for Scheduling Complex Real-Time Task Sets', Journal of computing and information technology, 8(3), str. 235-247. https://doi.org/10.2498/cit.2000.03.06
Vancouver
Garcia A, Crespo A, Sáez S, Vila J. A Hardware Architecture for Scheduling Complex Real-Time Task Sets. Journal of computing and information technology [Internet]. 2000 [pristupljeno 12.12.2019.];8(3):235-247. https://doi.org/10.2498/cit.2000.03.06
IEEE
A. Garcia, A. Crespo, S. Sáez i J. Vila, "A Hardware Architecture for Scheduling Complex Real-Time Task Sets", Journal of computing and information technology, vol.8, br. 3, str. 235-247, 2000. [Online]. https://doi.org/10.2498/cit.2000.03.06

Sažetak
The problem of jointly scheduling both hard deadline periodic tasks and soft aperiodic tasks has been the subject of considerable research in real-time systems. One of the most widely accepted solutions for this problem are slack stealing algorithms. However, these algorithms are rather impractical, since they all imply a considerable scheduler overhead. This paper faces the overhead problem by introducing a complete hardware architecture that implements slack stealing in hardware using an optimal algorithm redesigned to be implemented efficiently in hardware. The proposed solution is a circuit that behaves as a kind of sophisticated interrupt controller taking the task workload and the interrupts as inputs, and providing the highest priority task to be executed in the CPU. From the point of view of hardware design, the algorithm involves two main problems: first, to select the highest priority task at every moment and, second, to locate a set of slack gaps in a real-time computation. Locating slack gaps in a real-time computation is a problem that requires to “look forward in time” into the forecast schedule of a given workload. This paper analyses the different approaches for solving this problem and presents a novel architecture to solve it efficiently using a technique based on an event-driven simulation of the future of a real-time computation. A timing analysis of the proposed design is also presented.

Hrčak ID: 44839

URI
https://hrcak.srce.hr/44839

Posjeta: 420 *