Original scientific paper
Modeling, Control and Experimental Investigation of a Novel DSTATCOM Based on Cascaded H-bridge Multilevel Inverter
Lin Xu
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
Yang Han
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
Chen Chen
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
Jun-Min Pan
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
Gang Yao
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
Li-Dan Zhou
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
M.M. Khan
; Department of Electrical Engineering, Shanghai JiaoTong University, Shanghai, P. R. China
Abstract
A novel static synchronous compensator for reactive power compensation of distribution system (DSTATCOM) is proposed, based on the cascaded H-bridge multilevel inverter configuration. The mathematical formulation of the multilevel DSTATCOM is presented using state-space representations. A new software phase-locked loop (SPLL) is presented for grid synchronization and the obtained phase angle of the fundamental component of the grid voltage is utilized for deriving the active and reactive power balancing equations of the multilevel DSTATCOM. The proportional-resonant (PR) controller scheme is adopted for the current tracking control of the inverter, and the average dc-link voltage is controlled using a proportional-integral (PI) controller to regulate the active power flow of the DSTATCOM. Besides, the voltage balancing (VB) control among individual H-bridges is achieved by using separate PI regulators to control the difference voltage between the individual dc-link voltage and the average dc-link voltage. The validity of the proposed multilevel DSTATCOM and its control strategies is substantially confirmed by the extensive simulation results and the experimental results from the prototype system.
Keywords
Multilevel; Cascaded H-bridge; DSTATCOM; Phase-locked loop (PLL); Voltage balancing
Hrčak ID:
51365
URI
Publication date:
22.3.2010.
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