Izvorni znanstveni članak
Study of the gate capacitance of metal-oxide semiconductor structures of silicon inversion layers
Kamakhya Prasad Ghatak
; Department of Electronics and Telecommunication Engineering, Faculty of Engineering and Technology, University of Jadavpur, Calcutta-700 032, India
Bhaswati Mitra
; Office of the Controller of Examinations, University of Jadavpur, Calcutta-700 032, India
Sažetak
An attempt is made to investigate the gate capacitance of metal-oxide-semiconductor structures of silicon having both p and n-channel inversion layers under weak electric field limit of the basis of newly formulated 2D carrier energy spectra. It is found, that the same capacitance for both type of layers increases with increasing gate voltage and surface electric field, respectively. The theoretical formulation is in good agreement with the experimental observation as reported elsewhere and the corresponding results for inversion layers on parabolic semiconductors are also obtained from the expressions derived.
Ključne riječi
Hrčak ID:
331730
URI
Datum izdavanja:
4.12.1989.
Posjeta: 389 *